hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com features ? 10 to 450v input voltage range ? energy saving hold current mode ? adjustable microcontroller supply ? low supply current <1.0ma ? constant current coil ? programmable pull-in current, pull-in time, and hold current ? ef?cient pwm operation using the relay coils inductance applications ? industrial controls ? relay timers ? solenoid drivers ? home automation general description the supertex hv9901 is a bicmos/dmos universal relay driver that employs pwm switching techniques. it is designed for ef?cient and energy- saving operation of a low voltage relay with supply voltages ranging from 10 to 450v dc through utilization of the relay coils inductance. the circuit is capable of operating over a wide input voltage range without requiring a change of any external components. for example, this will enable users to use 5.0v coil relays for dc voltages 10 to 450v or ac voltages up to 240v. the hv9901 has an internal high-voltage regulator to power internal pwm circuitry. additionally, it includes an adjustable auxiliary regulator with a 1.0ma capability that can be used to supply low power micro controllers. the pull-in current, pull-in time and hold current are all program-mable using only two resistors and a capacitor. the pwm switching frequency can be either: - synchronized to an external clock, or - synchronized to other hv9901s, where the synchronized frequency is the highest free-running frequency. the enable (eni) logic input is used to turn the relay on/off. enable polarity may be selected via the pol input. audible noise is prevented using ?xed switching frequencies above 20khz. warning!!! galvanic isolation is not provided. dangerous voltages are present when connected to the ac line. it is the responsibility of the designer to ensure adequate safeguards are in place to protect the end user from electrical shock. universal relay driver typical boost application circuit
2 hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com ordering information device 16-lead soic 9.90x3.90mm body 1.75mm height (max) 1.27mm pitch hv9901 HV9901NG-G absolute maximum ratings parameter value input voltage v in 1 -0.5v to +470v input voltage to any other pin 1 -0.3v to v dd +0.3v operating temperature range -40c to +85c continuous power dissipation (t a = +25c) 2 750mw sym parameter min typ max units conditions high voltage regulator v in input voltage 10 - 450 v i cc = 0 to 1.0ma load i in supply current - - 2.0 ma no load at v dd . load at i cc = 1.0ma c gt = 500pf, f osc = 25khz v dd internally regulated voltage 8.5 9.0 9.5 v no load at v dd . c gt = 500pf, f osc = 25khz uv on v dd under voltage lockout, on 7.8 8.2 8.5 v --- uv hys v dd under voltage lockout, hysteresis - 0.5 - v --- adjustable regulator v cc regulator output voltage range 2.0 - 5.5 v i cc = 1.0ma load i cc regulator output current 0 - 1.0 ma no load at v dd * v fb feedback voltage 0 v ref v dd -1.0v v --- i fb input bias current - 25 100 na v fb = v ref electrical characteristics (t a = +25c unless otherwise noted) note: all voltages are referenced to com. for operation above 25c ambient derate linearly at 7.5 mw/c. stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the speci?cations is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. 1. 2. pin con?guration -g indicates package is rohs compliant (green) product marking 16-lead soic (ng) 16 1 vin gt cs co m sync rt vdd vref hold/dela y fb vcc eni eno pol 16-lead soic (ng) (top view) y = last digit of year sealed ww = week sealed l = lot number c = country of origin a = assembler id* = green packagin g *may be part of top markin g top markin g bottom marking hv9901ng y ww llllllll ccccccccc aaa 16-lead soic (ng) (top view) * maximum allowable load current limited by power dissipation and operating ambient temperature.
3 hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com sym parameter min typ max units conditions reference v ref bandgap reference voltage 1.20 1.25 1.30 v t a = -40c to +85c load regulation - - 7.0 mv 0ma < i ref < 0.3ma line regulation - 10 15 mv 8.5v < v dd < 9.5v i ref(short) short circuit current - - 1.0 ma --- i ref(sink) reference voltage sink current - - 20 a --- oscillator f osc pwm oscillator frequency 20 25 35 khz r t = 1.0m 80 100 140 khz r t = 226k - temperature coef?cient - 170 - ppm/ o c t a = -40 o c to +85 o c f sync oscillator sync frequency - - 150 khz --- i sync sync input/output sourcing current 20 - 55 a --- i sync sync input/output sinking current 1.0 - - ma v sync = 0.1v v sync sync input logic low voltage - - 1.0 v --- pwm d max maximum duty cycle 96.5 - 99.5 % r t = 1.0m 86.5 - 97.5 % r t = 226k t blnk blanking time 150 215 280 ns --- mosfet driver output v gth gate drive output high v dd -0.3 - - v i out = 10ma v gtl gate drive output low - - 0.30 v i out = -10ma t r rise time - 30 50 ns c gt = 500pf t f fall time - 30 50 ns current sensing v cs(hl) current sense voltage, high limit 0.775 0.833 0.891 v --- t delay(hl) current limit delay to gt, high limit - 200 250 ns 50mv overdrive i cs input bias current - 25 1000 na pol = low, eni = low v os low limit comparator input offset voltage - - 60 mv --- t delay(ll) current limit delay to gt, low limit - 200 250 ns 50mv overdrive v hold/del hold/delay output voltage v dd -0.4 - - v i hold/del (sourcing) -100a pol = low, eni = low i hold/del hold/delay input bias current - 25 500 na pol = low, eni = low electrical characteristics (t a = +25c unless otherwise noted)
4 hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com sym parameter min typ max units conditions t eni shutdown delay - 50 100 ns 2.0v < v cc < 5.5v v eni enable input voltage - high 0.7v cc - v cc v enable input voltage - low 0 - 0.3v cc v i eni enable input current - high - 1.0 5.0 a enable input current - low -5.0 -1.0 - a v pol polarity voltage - high 0.7v cc - v cc v polarity voltage - low 0 - 0.3v cc v i pol polarity current - high - 1.0 5.0 a polarity current - low -5.0 -1.0 - a v eno enable output voltage - high 0.9v cc - v cc v enable output voltage - low 0 - 0.1v cc v electrical characteristics (t a = +25c unless otherwise noted) pol eni eno gate drive output low low high v gt = oscillating output, duty cycle depends on inductive load low high low v gt = l ow , sync = high, oscillator shut down. high high low v gt = oscillating output, duty cycle depends on inductive load high low high v gt = low , sync = high, oscillator shut down. enable logic truth table application information i v r v v v r r v i v r t r r c v v v v f r v r r pul l i n cs hl sense cs hi cs ll dd hda hdb dd hold cs ll sense pul l i n h da hdb hd cs hl dd cs ll dd pwm osc cc fba ? ? = = = + = = = ? ( ) ? ? ? ? ? ? ? ? ? + ? = + ( ) ( ) ( ) ( ) ( ) ( ) ln 833mv no m 9.0v nom 3.23khz 21.8ghz 1.25v 1 1 1 ? (valid for f > 23khz) pwm fbb fbb ? ? ? ? ? ? i pull-in t pull-i n i hold time t n e r r u c figure 1
5 hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com application information (cont.) v re f pwm sync gt cs rt vin eni po l eno fb h/d vref vdd vcc 2.0C5.5v @ 1ma v in r sense r os c r hdb r hda c re f c dd c in q sw r fb a r fb b aux reg int reg hv9901 c hd figure 2 pin description pin # name description 1 vin input supply. 2 - pin not present 3 - pin not present 4 gt gate driver output for driving the external switching mosfet. 5 cs current sense input. 6 com common. connect to circuit ground. 7 sync open-drain input/output for synchronizing the internal pwm oscillator to other hv9901s or to an external clock. 8 rt a resistor from this pin to ground sets the pwm switching frequency. 9 pol input that determines the polarity of the eni input. see the truth table. 10 eno enable out. it is the logical inversion of the eni signal. 11 eni enabled input. whether eni is active low or active high is determined by the pol input. 12 vcc output of the internal auxiliary regulator. output voltage is determined by the resistive divider con - nected to the fb pin. 13 fb feedback input for the auxiliary regulator. 14 h/d hold/delay input. an rc network connected to this pin controls the pull-in time and the holding current. see the equations on page 4. 15 vref internal reference voltage. bypass locally with a 10nf capacitor . 16 vdd output of the internal regulator. bypass locally with a 10nf capacitor.
6 hv9901 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com functional block diagram vi n 1n414 8 a rs 100n f uvl o c see note 1. vre f vdd 1 00nf 4. 7 f r s r cs gt 7 3 9 4 n 1 y a l e r vn2460n 8 le d 10k bandga p ref erence 1.25 v co m q vdd oscillato r shut do wn sync ros c rt en i en o po l vc c p 100n f 5 v r fb a r fb b fb hold/dela y r hd b r hd a 4 5 6 7 8 9 10 11 12 13 14 15 16 ch d c c high limit lo w limi t vdd 21 5n s del ay r 2r 1.25 v vd d high duty cycle oscillato r 1 vdd 40 a 5.5k ? notes: this diode and bridge recti?er required only for ac operation. for non-isolated ac operation the entire circuit must be ?oating. all comparators have open drain outputs. 1. 2. 3.
supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate product liability indemnification insurance agreement. supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. website: http//www .supertex.com . ?2008 all rights reserved. unauthorized use or reproduction is prohibited . 1235 bordeaux drive, sunnyvale, ca 9408 9 te l: 408-222-8888 www .supertex.com 7 hv9901 (the package drawing(s) in this data sheet may not re?ect the most current speci?cations. for the latest package outline information go to http://www.supertex.com/packaging.htm l .) doc.# dsfp-hv9901 b103008 16-lead soic (narrow body) package outline (ng) 9.90x3.90mm body, 1.75mm height (max), 1.27mm pitch symbol a a1 a2 b d e e1 e h l l1 l2 1 dimension (mm) min 1.35* 0.10 1.25 0.31 9.80* 5.80* 3.80* 1.27 bsc 0.25 0.40 1.04 ref 0.25 bsc 0 o 5 o nom - - - - 9.90 6.00 3.90 - - - - max 1.75 0.25 1.65* 0.51 10.00* 6.20* 4.00* 0.50 1.27 8 o 15 o jedec registration ms-012, variation ac, issue e, sept. 2005. * this dimension is not speci?ed in the original jedec drawing. the value listed is for reference only. drawings are not to scale. supertex doc. #: dspd-16song, version f101708. d seating plane gauge plane l l1 l2 to p v iew side v iew vi ew a-a vi ew b vi ew b 1 e1 e a a2 a1 a a seating plane e b h h 16 1 note 1 note 1 (index area d/2 x e1/2) note: this chamfer feature is optional. if it is not present, then a pin 1 identi?er must be located in the index area indicated. the pin 1 identi?er can be: a molded mark/identi?er; an embedded metal marker; or a printed indicator. 1.
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